Power semiconductor device manufacturers are constantly striving to increase the performance of their products, while decreasing their cost of manufacture. A cost intensive area in the manufacture of power semiconductor arrangements is packaging the power semiconductor chip. As the performance of semiconductor power arrangements is strongly dependent from the heat dissipation capability provided by the package, high effort, expenditure and cost are needed for implementing semiconductor power arrangements comprising a plurality of densely packed power semiconductor chips. As such, low cost semiconductor power arrangements of high thermal robustness, improved heat dissipation capability and increased reliability and electrical performance are desirable.
For these and other reasons, there is a need for the present invention.